Startup Tilera announced Monday that the company has begun shipping what you might call a "mega-multicore" chip, the TILE64, one that can scale to hundreds or thousands of cores. Unfortunately, you won't be using it, however, unless you're involved in the design of network switches or CGI render farms.

Tilera, like the name suggests, is a "tiled" architecture, one that connects each processor through an I/O network. What's interesting is that the design of the chip is pretty conventional; each core has a level 1 and level 2 cache for storing instructions, like a PC processor, and each core connects to the others via shared L3 cache. That's pretty efficient.

And the really interesting thing? Each core can run Linux. But there's no indication that that phrase means that the chip can run anything but a specifically modeled Linux kernel, and not a more mainstream implementation like Ubuntu.

As the name suggests, Tilera's chip includes 64 cores. A 36-core and a 120-core chip is also planned. More features after the jump.

Developing a core is one thing; tying it to other computing elements has always been the difficult portion. Intel, for example, has traditionally struggled with this in desktop computing, routing its Core Duo processors through a single bus. AMD, meanwhile, uses a technology it helped develop, called HyperTransport. Server manufacturers have taken this further, and come up with technologies like PCI-X and Infiniband to try and diversify the bus structure.

Indeed, the multiprocessing approach for digital multimedia was commercialized as far back as 2003, when ClearSpeed launched its own multimedia coprocessor. The difference there was that it used an array of 64 coprocessing elements, rather than the full-fledged array of cores within Tilera's chip.

Tilera doesn't skimp on the off-chip I/O, either: four DDR2 memory controllers and a complete array of high speed I/O interfaces, including two 10 Gbit/s XAUI interfaces, two 10 Gbit/s PCIe connections, two 1 Gbps Ethernet interfaces, and a programmable flexible I/O interface to support interfaces such as compact flash and disk drives, according to the company.

Tilera actually builds in a tiny network switch into each core, which it calls iMesh (think "interactive," not Apple), which routes data to all the other network switches, and from there to the other processors. The combination of the switch plus the processor is called a "tile". The iMesh provides each tile with more than a terabit of bandwidth, creating a more efficient distributed architecture and eliminating the on-chip data congestion, according to Tilera

Tilera was founded in 2004 to bring to market the MIT research of Dr. Anant Agarwal, who first created the mesh-based multicore architecture in 1996. Behind the scenes, Tilera has "Tilera has a dozen customers who are currently integrating the TILE64 processor into products in the advanced networking and digital multimedia space," according to the company.

Multicore is clearly the wave of the future; think of Intel's 80-core research chip. And if you're interested, you can spend $435 to buy one of Tilera's new cores. Unfortunately, that price also assumes you're buying 9,999 more in the same purchase; individual chip pricing might be a tad higher.